Here at Sigasi, we are immensely devoted to the culture of testing. We believe in the power of test driven development and think it’s a great tool that can integrate with hardware design.
In the past we’ve made efforts to integrate VUnit into Sigasi Studio and now with our VS Code extension, we want to give to our users the ability to work with their HDL projects and use VUnit in their workflow as well.
Setting up:
- Install the Sigasi extension from the VS Code marketplace
- Once that’s done, just open your HDL project and open a VHDL or (System)Verilog file.
- Now, for Sigasi to correctly link your design with the VUnit libraries you must add the libraries that come installed with VUnit as a external folder. You can do that through the project view that comes with the Sigasi extension and selecting the folder where VUnit is installed:
- If you want to know where your VUnit is installed you can execute:
$ pip show vunit-hdland it will be underlocation:
- Finally, just match the library mapping with the one in your
run.py:
See also
- Sigasi extension for VS Code (screencast)
- VUnit projects in Sigasi Studio (blog post)
- Setup a SystemVerilog UVM project in VS Code (blog post)
- Using VUnit in a Gitlab CI Verification Environment (blog post)
- VUnit: managing input files and compile order (blog post)