I met Hendrik and Philippe, Sigasi’s founders, for the first time in early 2008. They explained their plans and showed me a prototype of their IDE for VHDL. That prototype has since evolved into the product you all know and love: Sigasi HDT.
I was intrigued. We had a few more meetings, and I decided to join them in their efforts to get the company off the ground. My main motivation: the idea behind Sigasi HDT coincides completely with my own vision on hardware design.
For their PhD work Hendrik and Philippe had been doing both software and hardware development. For software, they used modern methodologies and tools, such as an Eclipse-based Java IDE. They found that sophisticated features such as VHDL Autocompletion and automated refactorings improved productivity and code quality significantly.
Naturally, they looked for something similar for hardware development. However, to their suprise, they found nothing that came even close. Out of this frustration grew the idea for a tool that would make the most modern software development techniques available to the hardware designer. That was the origin of Sigasi HDT.
My own career has been guided by the vision that digital hardware design can be viewed as a kind of software development. That explains why I am so excited about Sigasi HDT. However, even today, almost 20 years after I subscribed to this vision, I hesitate to write it down. It is still often met with scepticism. For example, it is still often asserted that “one shouldn’t write HDL code like a software engineer”. However, I believe the sceptics have it wrong. They misunderstand how a good software engineer actually thinks and works.
Today, I am announcing a blog about my personal views on HDL design. I believe they are relevant for the future, but I will talk frequently about the past. Insight in the past is very helpful to understand the issues, especially for younger engineers. If you are interested, you can easily follow my contributions on this page.
- Academic frustration (opinion)
- Synthesis was my first love (opinion)
- A 20-year old relationship (opinion)
- Fixing Verilog is easy (opinion)
- Wasting real time in zero time (opinion)