This style validation checks whether the relative order of the port connection, argument, or parameter list matches the order used in the declaration.
Port Connections
module top(input a, output b, inout c);
endmodule
module example();
logic a, b, c;
top explicit_named_ordered(.a(a), .b(b), .c(c));
top explicit_named_unordered(.a(a), .c(c), .b(b));
top implicit_named_ordered(.a, .b, .c);
top implicit_named_unordered(.a, .c, .b);
endmodule
Arguments
task tsk(input logic a, output b, output c);
endtask : tsk
function func(input logic a, output b, output c);
endfunction : func
class Cls;
function new(input logic a, output b, output c);
endfunction
endclass
module test();
logic a, b, c;
Cls inst = new(.a(a), .c(c), .b(b));
initial begin
tsk(.b(b), .c(c), .a(a));
func(.a,.b, .c);
end
endmodule : test
Parameters
module top#(type A, B)();
endmodule
class Cls#(type A, B);
endclass
module test();
Cls#(.A(logic), .B(5)) inst = new();
top#(.B(5), .A(logic)) top_instance();
endmodule : test
Rule configuration
This rule can be disabled for your project, or its severity and parameters can be modified in the project linting settings. Alternatively, it can be manually configured with the following template:
163/severity/${path}={error|warning|info|ignore}
163/params/check_port_connections/${path}={true|false}
163/params/check_arguments/${path}={true|false}
163/params/check_parameters/${path}={true|false}