Verilog functions


Non-blocking assignments are not allowed in functions

A blocking assignment (<=) is not allowed in a (System)Verilog function. Sigasi Studio flags an error if a blocking assignment is used in a function (rule 41).

A good fix to correct the problem is to replace non-blocking assignments to blocking =

module badcode;
	function plus_one;
		input integer a;
		begin
			plus_one <= a + 1;
		end
	endfunction
endmodule

module goodcode;
	function plus_one;
		input integer a;
		begin
			plus_one = a + 1;
		end
	endfunction
endmodule

Function prototype has implicit return type

SystemVerilog function prototypes (pure virtual functions) should have a return type. Sigasi Studio flags a warning for function prototypes without return type (rule 10).

virtual class badclass;
    pure virtual function myfunc(input bit[31:0] data);           // return type missing
endclass

virtual class goodclass;
    pure virtual function integer myfunc(input bit[31:0] data);
endclass

Project specific setting of these rules

These rules can be disabled for your project, or its severity can be modified in the project linting settings.

Manual configuration in ${project location}/.settings/com.sigasi.hdt.verilog.linting.prefs:

10/severity/<project>=IGNORE

41/severity/<project>=IGNORE