VHDL Linting

List of VHDL Linting Rules

The table below lists the VHDL linting rules that can be checked automatically by Sigasi. The availability of linting rules depends on the license requirements.

ST Linting Rules

ST linting rules are available for all licenses including Sigasi Studio Starter .

errorPositional associations order2
error‘Others’ position in associations3
errorMultiple others in associations4
errorInput port cannot be assigned5
errorSubprogram parameter cannot be assigned6
errorConstant cannot be assigned7
error‘others’ has to be the last alternative in a case statement9
errorOnly one ‘others’ choice is allowed10
error with lightbulbCase statement does not cover all cases11
errorCase alternative contains duplicate choices14
error with lightbulbC style equality operator15
error with lightbulbC style inequality operator16
error with lightbulbIncomplete associations17
errorDuplicate associations18
errorInvalid character literal19
errorFunction declarations in a package cannot have a function body21
errorMissing function body22
errorInvalid bit string literal23
errorDuplicate named associations27
errorDuplicate ‘all’ -style binding for component declaration28
errorDuplicate component instantiation binding29
errorDuplicate component instantiation binding30
errorIncorrect number of associations found in mapping32
errorA positional association cannot follow after a named association33
error with lightbulbA signal cannot be the target of a variable assignment34
error with lightbulbA port cannot be the target of a variable assignment35
error with lightbulbA variable cannot be the target of a signal assignment36
errorA process with a sensitivity list cannot contain any wait statements39
errorProcedure declarations in a package cannot have a procedure body40
errorProcedure declarations in a package body must have a procedure body41
errorGenerate statements must have a label42
errorInstantiation statements must have a label43
errorBlock statements must have a label44
errorMatching case statement51
errorExternal name alias52
error with lightbulbVHDL version check53
errorDuplicate declaration54
errorA unary condition operator parentheses58
errorDuplicate enum literal69
errorInvalid identifier70
errorFunction pureness validation76
errorMissing implementation80
error with lightbulbIncorrect attribute class81
errorInvalid variable assignment82
errorInvalid signal assignment83
errorA subprogram call cannot have an empty parameter lis86
errorUnexpected tokens91
errorProtected type bodies are not allowed in a package168
errorInvalid use of ‘bus’ keyword171
errorInvalid function parameter mode172
errorInvalid variable parameter in function173
errorInvalid function return type174
errorInvalid deferred constant declaration175
errorThis declaration is not allowed in the current declarative region176
errorVHDL 87 file declarations191
errorConcatenation of unconstrained aggregate194
error with lightbulbEmpty sensitivity list197
error with lightbulbInstantiation mismatch198
errorRange wrapped inside parentheses199
errorIncomplete record aggregate200
errorNo elements in a list201
error with lightbulbTrailing separator in a list202
error with lightbulbVHDL version check212
error with lightbulbInvalid use of return type identifiers213
error with lightbulbConditional return statements214
errorString literal is not properly closed215
errorAn exponent for an integer literal shall not be negative218
errorDeclaring the library ‘work’ is not allowed inside a context declaration219
errorReferencing the library ‘work’ is not allowed inside a context declaration220, 221
errorLoop variables cannot be assigned227
errorDeclaration not found229
errorMissing full constant declaration233
errorIncorrect full constant subtype234

XL Linting Rules

XL linting rules require a Sigasi Studio XL or Sigasi Studio XPRT license.

warningNull range: The left argument is strictly larger than the right1
warning with lightbulbDeprecated IEEE packages8
warningCase alternative contains redundant choices12
warningCase statement contains all choices explicitly. You can safely remove the redundant ‘others’13
warningInfinite loop. Loop is missing a wait, return or exit statement20
warningNull range: The left argument is strictly smaller than the right26
info with lightbulbNon-standard packages37
warning with lightbulbA process must either have a sensitivity list or contain one or more wait statements38
infoThere has to be a whitespace before physical units47
ignoreUnbound component instantiations48
warningSuperfluous library clause49
warning with lightbulbLibrary is not available50
warning with lightbulbFind unused declarations55
warningBitstrings may only contain std_logic metavalues57
errorDuplicate design units64
warningFind unused ports67
warningFind unused generics68
warningFind dead states in state machines71
warning with lightbulbFind incomplete sensitivity lists72
warningFind superfluous signals in sensitivity lists73
warningFind dead code79
ignoreReport encrypted files84
warningFind duplicate signals in sensitivity lists85
warningDetect signals and variables that are never written88
warningDetect signals and variables that are never read89
warningNone or multiple matching entities for component90
ignoreCheck naming conventions92
ignore with lightbulbIncomplete port map or generic map: using defaults94
ignoreCheck line length97
warningArray assignment validation144
ignore with lightbulbAll references must have the same capitalization as their declaration163
ignoreCheck for positional associations in instantiations164
errorInvalid port associations169
errorVHDL version mismatch170
ignore with lightbulbOrder of generic and port associations177
error with lightbulbName mismatch178
errorUnexpected return type179
errorConfiguration issue: Incorrect component name180
errorConfiguration issue: Incorrect instantiation statement label181
warningConfiguration issue: Missing or incorrect binding indication182
errorConfiguration issue: Incorrect name in binding indication183
errorIncorrect use of keyword all184
warningRedundant boolean equality check with true185
ignoreBoolean equality check with false186
warning with lightbulbCheck for component/entity mismatch187
ignoreHeader comment does not match pattern188
ignoreFilename must contain primary unit name189
warningEmpty loop statement190
infoEntity name is a keyword in Verilog and may cause problems in mixed projects192
errorCannot case on a type declaration209
warningIndex out of range210
warningSlice has wrong direction211
errorReferencing the library ‘work’ is not allowed inside a context declaration220
error with lightbulbCommon Libraries version mismatch222
error with lightbulbVHDL version check223
ignoreCheck case of non-keywords224
errorType validation226
infoWhitespace in extended identifier228
ignoreSequence of operators without parentheses230
ignoreConstant width vector assigned to signal231
warningComparison of vectors with different sizes232
ignoreMagic number, bitstring, or string in statement235
ignoreUnconstrained signal or variable of integer type236
ignoreUnexpected FSM state type237
ignoreIncomplete reset branch238
ignoreDeep nesting of conditional and loop statements239
ignoreUnexpected keyword capitalization240
ignoreIncorrect vector range direction241
ignoreFile contains multiple primary units242
ignoreSecondary unit in unexpected file243
ignoreProhibited attribute244
ignoreProhibited keyword or operator245
ignoreProhibited package246
ignoreProhibited pragma247
ignoreProhibited library248
ignoreClock signal not used as clock249
ignoreUnexpected clock edge specification250
ignoreMissing label251
ignoreInconsistent reset style252
ignoreMultiple objects in one declaration253
ignoreInconsistent clock edge usage254

Deprecated Linting Rules

Deprecated linting rules were used by Sigasi at some point, but they’ve been removed or superseded in the most recent version.

Invalid generic listSuperseded by 20224
Invalid generic mapSuperseded by 20225
Duplicate architecture for entitySuperseded by 6431
Port map lists cannot be terminated with a ,Superseded by 20245
Port lists cannot be terminated with a ,Superseded by 20246
Signal declarations are not allowed in a process statementSuperseded by 17656
End clause validationSuperseded by 5159
Duplicate entity for librarySuperseded by 6460
Duplicate package for librarySuperseded by 6461
Duplicate configuration for librarySuperseded by 6462
Invalid use clauseRemoved as it was invalid63
Duplicate design unit in IEEERemoved as it was invalid65
Find unregistered output portsRemoved as it was invalid75
Undefined identifierSuperseded by the linker87
RE2/J compatibility checkSuperseded by checks in the preferences225